DOCUMENTATION

CONTENTS

MODULES

KNOWN ISSUES

FINAL NOTES

MODULES

Clock Div

Complete manual and reference for the Clock Div module.

UPDATED MAR 9, 2026

How Does It Work?#

Clock Div takes an incoming master clock and splits it into several slower rhythmic streams, exposing both short trigger outputs and longer gate outputs for each division.

Quick Overview#

  • It accepts one incoming PPQN clock plus RST.
  • It provides paired trigger and gate outputs for /1, /2, /4, /6, /8, /16, and /32.
  • Mode switches between raw pulse-count division and musical bar-grid division.
  • PPQN tells the musical mode whether the upstream clock is running at 16 or 24 PPQN.

Inputs And Outputs#

PortTypeWhat It Does
PPQNClockIncoming master clock. The divider counts rising edges from this signal.
RSTTriggerResets all division counters and waits for the next incoming pulse.
/1 T ... /32 TClockShort trigger outputs at the start of each division cycle.
/1 G ... /32 GGateMatching gate outputs for the same divisions.

Controls Reference#

ControlValuesDefaultBehavior
ModePPQN, MUSMUSChooses raw pulse division or musical bar-grid division.
PPQN16, 2424Sets the reference pulse density used by MUS mode.

PPQN Mode Vs MUS Mode#

PPQN#

In PPQN mode, the division labels mean exactly what they say in pulse counts:

  • /2 fires every second incoming pulse
  • /4 fires every fourth pulse
  • /6 fires every sixth pulse

This is the mode to use when you want strict clock math from a dense master pulse stream.

MUS#

In MUS mode, the same labels are interpreted against a 4/4 bar grid derived from the selected PPQN setting:

  • /1 is once per bar
  • /2 is twice per bar
  • /4 is quarter-note rate
  • /8, /16, and /32 move into faster note divisions
  • /6 splits the bar into six equal steps

This mode is usually the more musical choice when your source clock is a regular 16 or 24 PPQN transport pulse.

Trigger And Gate Behavior#

  • Trigger outputs are short pulses at the start of each cycle.
  • Gate outputs stay high for roughly the first half of each division cycle.
  • Before the first clock pulse arrives, the outputs remain inactive.
  • In raw PPQN mode, the /1 G output follows the incoming clock's high state directly because its division period is one pulse.

Reset And Sync Notes#

  • RST is edge-triggered.
  • Reset clears every division counter at once.
  • After a reset, the module waits for the next incoming pulse and then restarts all divisions from the top of their cycles together.

Panel Layout#

Each row on the panel represents one division:

  • left label = division amount
  • TRIG jack = short pulse output
  • GATE jack = longer gate output
  • LED = live activity for that row

That layout makes it easy to patch several rhythmic layers out of the same master clock without guessing which jack belongs to which division.