How Does It Work?#

PWM Osc Engine is a pulse modulation voice that can chop audio in two classic ways (sign-flip or gate) and can also run a comparator-style PWM mode with a dedicated carrier output.

CLICK TO ENLARGE

Quick Overview#

• It contains an internal oscillator (Sine, Tri, Saw, Square, Fold, Noise/S&H).
• It can use external audio, internal audio, or a mix of both as the modulation source.
• It provides 3 operation modes:
  • Sign-Flip
  • Gate Chop
  • PWM Compare
• It exposes 3 outputs:
  • Out (main audio)
  • Gate (pulse/comparator state)
  • Carrier (carrier waveform used by PWM section)

Signal Flow (DSP Path)#

For each sample, the engine does this:

1. Read all inputs (In, Gate Freq CV, Duty CV, Osc Freq CV, Reset, Sync).
2. Detect trigger/clock rising edges (threshold crossing above 0.5) for Reset and Sync.
3. Smooth key parameters (Osc Freq, Gate Freq, Duty, Drive) over ~20 ms.
4. Apply CV modulation:
   • f0 *= 2^(clamp(f0_cv, -5, 5) / 5)
   • fg *= 2^(clamp(fg_cv, -5, 5) / 5)
   • duty += clamp(duty_cv, -5, 5) / 10
5. Clamp operating ranges:
   • f0, fg to [0.01, 0.49 * sample_rate]
   • duty to [0.01, 0.99]
6. Generate the internal oscillator sample.
7. Resolve source selection (External, Internal, or Mix).
8. Apply drive stage (gain = 1 + 8 * drive) with soft saturation (tanh).
9. Generate pulse/carrier and compute selected mode output:
   • Sign-Flip: multiply by bipolar pulse
   • Gate Chop: multiply by unipolar pulse
   • PWM Compare: comparator (mod_signal >= carrier) with edge smoothing
10. Apply output conditioning (DC blocker / anti-alias post-filter depending on mode and oversampling), sanitize NaN/Inf, flush denormals, and clamp outputs.

Inputs And Outputs#

Port	Type	What It Does
In	Audio	External signal source and/or PWM compare mod source (depending on Source and PWM Source). If unpatched, it is normalled to the internal oscillator.
Gate Freq CV	CV	Exponential modulation of gate/carrier frequency.
Duty CV	CV	Linear offset of pulse duty cycle.
Osc Freq CV	CV	Exponential modulation of internal oscillator frequency.
Reset	Trigger	Resets oscillator phase, pulse phase, or both (based on Reset Target).
Sync	Clock	Hard sync for pulse phase only.
Out	Audio	Final processed output.
Gate	Gate	Pulse/comparator state output (polarity depends on settings).
Carrier	Audio	Carrier waveform output (Tri or Saw).

Controls Reference#

Signal Section#

Control	Values	Default	Behavior
Mode	Sign-Flip, Gate Chop, PWM Compare	Sign-Flip	Selects PWM math path for Out and Gate.
Source	External, Internal, Mix	Internal	Chooses what feeds the drive/modulation path.
Drive	0..1	0.2	Applies pre-mode gain and soft saturation.

Oscillator Section#

Control	Values	Default	Behavior
Waveform	Sine, Tri, Saw, Square, Fold, Noise/S&H	Saw	Internal oscillator shape.
Osc Freq	0.01..20000 Hz	220 Hz	Base frequency for internal oscillator.
Gate Freq	0.01..20000 Hz	120 Hz	Frequency for pulse/carrier generation.
Duty	0.01..0.99	0.5	Pulse width target before CV and clamp.

Options Section#

Control	Values	Default	Behavior
Polarity	Unipolar, Bipolar	Bipolar	Output/gate polarity behavior, especially in compare mode.
Oversample	1x, 2x, 4x	2x (UI default)	Internal anti-alias quality/perf tradeoff.
Reset Target	Both, Osc, Pulse	Both	Chooses which phase domains respond to Reset.
Carrier	Tri, Saw	Tri	Carrier shape for PWM compare path and carrier output.
PWM Source	External, Internal	Internal	Selects compare input source in PWM Compare mode.

Mode Behavior In Detail#

Sign-Flip#

• Uses a bipolar pulse (-1/+1) as multiplier.
• Effect: polarity inversion/chopping of the driven source.
• Output is naturally bipolar and includes a DC-block path.

Formula intuition: out = driven_signal * pulse_bipolar

Gate Chop#

• Uses a unipolar pulse (0/1) as multiplier.
• Effect: classic on/off tremolo/chopping.
• Gate output is unipolar when Polarity = Unipolar.

Formula intuition: out = driven_signal * pulse_unipolar

PWM Compare#

• Compares modulation signal to carrier signal:
  • comparator high when mod_signal >= carrier
• Edges are smoothed to reduce aliasing artifacts.
• Carrier output exposes the active carrier waveform.

Comparator intuition: pwm_state = (mod_signal >= carrier) ? 1 : 0

Source And Modulation Routing#

• Source = External:
  • Uses In if patched.
  • Uses internal oscillator if In is unpatched (normalled behavior).
• Source = Internal:
  • Uses internal oscillator only.
• Source = Mix:
  • Averages external-normalled signal and internal oscillator.
• PWM Source applies to compare mode source selection (External or Internal).

CV Scaling#

• Osc Freq CV and Gate Freq CV are exponential in a clamped -5V..+5V range:
  • at -5V: 0.5x frequency
  • at 0V: 1.0x frequency
  • at +5V: 2.0x frequency
• Duty CV is linear:
  • duty += cv / 10, with cv clamped to -5..+5
  • Max contribution is -0.5..+0.5 before final duty clamp

Reset And Sync#

• Rising-edge threshold is 0.5.
• Reset follows Reset Target:
  • Both: reset oscillator and pulse phases
  • Osc: reset oscillator only
  • Pulse: reset pulse only
• Sync always resets pulse phase only.
• Pulse reset also clears compare-edge memory.
• In Noise/S&H, oscillator reset refreshes the held random value.

Oversampling, Filtering, And Latency Notes#

• Oversample modes:
  • 1x: no oversampled subsample set
  • 2x: two subsamples then FIR decimation via 4x decimator frame mapping
  • 4x: four subsamples then FIR decimation directly
• Only Out is FIR-decimated. Gate and Carrier use the last subsample result.
• The oversampler is a 4x polyphase FIR design:
  • 257 taps
  • linear phase
  • ~80 dB stopband attenuation
  • base-rate latency constant: 64 samples
• Additional one-pole low-pass post-filter is used only when:
  • mode is not PWM Compare
  • oversampling is 1x

Output Safety And Limits#

• Soft saturation in drive stage (tanh).
• DC blocker behavior:
  • always enabled in Sign-Flip
  • disabled in Gate Chop
  • enabled in PWM Compare only when Polarity = Bipolar
• Final hard clamps:
  • Out: [-2.0, 2.0]
  • Gate: [-1.5, 1.5]
  • Carrier: [-1.5, 1.5]
• Non-finite values are sanitized to stable output.

Scope Section (Panel)#

The built-in scope panel is for analysis/visualization:

• Probe targets: Out, Gate, Carrier
• Optional spectrum view toggle
• Time buttons: S, M, L
• Playback controls: PLAY / PAUSE